internally compensated, high performance dual operational amplifiers the mc1458, c was designed for use as a summing amplifier, integrator, or amplifier with operating characteristics as a function of the external feedback components. ? no frequency compensation required ? short circuit protection ? wide common mode and differential voltage ranges ? low power consumption ? no latchup maximum ratings (t a = +25 c, unless otherwise noted.) rating symbol value unit power supply voltage v cc v ee +18 18 vdc input differential voltage v id 30 v input common mode voltage (note 1) v icm 15 v output short circuit duration (note 2) t sc continuous operating ambient temperature range t a 0 to +70 c storage temperature range t stg 55 to +125 c junction temperature t j 150 c notes: 1. for supply voltages less than 15 v, the absolute maximum input voltage is equal to the supply voltage. 2. supply voltage equal to or less than 15 v. on semiconductor device operating temperature range package mc1458, c ordering information mc1458cd, d mc1458cp1, p1 t a = 0 to +70 c so8 plastic dip a + + b semiconductor technical data dual operational amplifiers (dual mc1741) p1 suffix plastic package case 626 d suffix plastic package case 751 (so8) 1 1 8 8 inputs a - - 1 2 3 4 8 7 6 5 (top view) v ee output a output b v cc inputs b pin connections ? semiconductor components industries, llc, 2001 march, 2001 rev. 2 1 publication order number: mc1458/d representative schematic diagram noninverting input inverting input v cc v ee 39 k 1.0 k 1.0 k 50 k 50 k 50 50 25 4.5 k 7.5 k 30pf output
mc1458, c http://onsemi.com 2 electrical characteristics (v cc = +15 v, v ee = 15 v, t a = 25 c, unless otherwise noted. (note 3)) mc1458 mc1458c characteristic symbol min typ max min typ max unit input offset voltage (r s 10 k) v io 2.0 6.0 2.0 1.0 mv input offset current i io 20 200 20 300 na input bias current i ib 80 500 80 700 na input resistance r i 0.3 2.0 2.0 m w input capacitance c i 1.4 1.4 pf offset voltage adjustment range v ior 15 15 mv common mode input voltage range v icr 12 13 11 13 v large signal voltage gain a vol v/mv (v o = 10 v, r l = 2.0 k) 20 200 (v o = 10 v, r l = 10 k) 20 200 output resistance r o 75 75 w common mode rejection (r s 10 k) cmr 70 90 60 90 db supply voltage rejection (r s 10 k) psr 30 150 30 m v/v output voltage swing v o v (r s 10 k) 12 14 11 14 (r s 2.0 k) 10 13 9.0 13 output short circuit current i sc 20 20 ma supply currents (both amplifiers) i d 2.3 5.6 2.3 8.0 ma power consumption p c 70 170 70 240 mw transient response (unity gain) (v i = 20 mv, r l 2.0 k w , c l 100 pf) rise time t tlh 0.3 0.3 m s (v i = 20 mv, r l 2.0 k w , c l 100 pf) overshoot os 15 15 % (v i = 10 v, r l 2.0 k w , c l 100 pf) slew rate sr 0.5 0.5 v/ m s electrical characteristics (v cc = +15 v, v ee = 15 v, t a = t high to t low , unless otherwise noted. (note 3))* mc1458 mc1458c characteristic symbol min typ max min typ max unit input offset voltage (r s 10 k w ) v io 7.5 12 mv input offset current (t a = 0 to +70 c) i io 300 400 na input bias current (t a = 0 to +70 c) i ib 800 1000 na output voltage swing v o v (r s 10 k) 12 14 (r s 2 k) 10 13 9.0 13 large signal voltage gain a vol v/mv (v o = 10 v, r l = 2 k) 15 (v o = 10 v, r l = 10 k) 15 *t low = 0 c for mc1458, c t high = +70 c for mc1458, c note: 3. input pins of an unused amplifier must be grounded for split supply operation or biased at least 3.0 v above v ee for single supply operation.
mc1458, c http://onsemi.com 3 figure 1. burst noise versus source resistance figure 2. rms noise versus source resistance figure 3. output noise versus source resistance figure 4. spectral noise density figure 5. burst noise test circuit unlike conventional peak reading or rms meters, this system was especially designed to provide the quick response time essential to burst (popcorn) noise testing. the test time employed is 10 sec and the 20 m v peak limit refers to the operational amplifier input thus eliminating errors in the closed loop gain factor of the operational amplifier . r s , source resistance ( w ) 0 10 100 1000 10 100 1.0 k 10 k 100 k 1.0 m bw = 1.0 hz to 1.0 khz e n , e n , input noise (peak) ( v) m r s , source resistance ( w ) 0.1 1.0 10 100 10 100 1.0 10 k 100 k 1.0 m bw = 1.0 hz to 1.0 khz output noise (rms mv) r s , source resistance ( w ) 0 0.1 1.0 10 10 100 1.0 k 10 k 100 k 1.0 m a v = 1000 10 1.0 e n , 100 f, frequency (hz) 10 100 1.0 k 100 k 10 k 140 120 100 80 40 20 0 60 a v = 10, r s = 100 k w input noise ( nv/ hz ) + 1.0 k operational amplifier under test low pass filter 1.0 hz to 1.0 khz 100 k x 500 x 2 to pass / fail indicator - 100 k 100 k + + - - positive threshold voltage negative threshold voltage e n , input noise (peak) ( v) m
mc1458, c http://onsemi.com 4 v o , output voltage (v ) pp v o , output voltage swing (v pp ) figure 6. power bandwidth (large signal swing versus frequency) figure 7. open loop frequency response figure 8. positive output voltage swing versus load resistance figure 9. negative output voltage swing versus load resistance figure 10. output voltage swing versus load resistance (single supply operation) figure 11. single supply inverting amplifier f, frequency (hz) 10 100 1.0 k 100 k 10 k 28 24 20 16 8.0 4.0 0 12 f, frequency (hz) 0 -20 20 40 60 80 100 120 10 100 1.0 k 10 k 100 k 1.0 m 10 m 10 voltage gain (db) a vol , r l, load resistance ( w ) 15 v supplies 12 v 15 13 11 9.0 7.0 5.0 3.0 1.0 100 200 500 700 1.0 k 2.0 k 5.0 k 7.0 k 10 k 9.0 v 6.0 v v o , output voltage swing (v) r l, load resistance ( w ) 15 v supplies 12 v -15 -13 -11 -9.0 -7.0 -5.0 -3.0 -1.0 100 200 500 700 1.0 k 2.0 k 5.0 k 7.0 k 10 k 9.0 v 6.0 v v o , output voltage swing (v) +27 v +24 v +21 v +18 v +15 v +12 v +9.0 v +6.0 v +5.0 v +30 v supply 28 24 20 16 12 8.0 4.0 0 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10 r l , load resistance (k w ) 100 m f r l v cc 200 k 50 k + v in 7 4 2 3 10 k - mc1558 1.0 k 200 k 50 k 100 m f (voltage follower) thd < 5%
mc1458, c http://onsemi.com 5 figure 12. noninverting pulse response figure 13. transient response test circuit figure 14. unused opamp 5.0 v/div 10 m s/div output input + r l c l to scope (input) to scope (output) - 70 75 80 90 95 100 105 85 0 2.0 4.0 6.0 8.0 10 12 14 16 18 20 v cc , |v ee |, supply voltages (v) a v , voltage gain (db) figure 15. open loop voltage gain versus supply voltage + -
mc1458, c http://onsemi.com 6 package dimensions notes: 1. dimension l to center of lead when formed parallel. 2. package contour optional (round or square corners). 3. dimensioning and tolerancing per ansi y14.5m, 1982. 14 5 8 f note 2 a b t seating plane h j g d k n c l m m a m 0.13 (0.005) b m t dim min max min max inches millimeters a 9.40 10.16 0.370 0.400 b 6.10 6.60 0.240 0.260 c 3.94 4.45 0.155 0.175 d 0.38 0.51 0.015 0.020 f 1.02 1.78 0.040 0.070 g 2.54 bsc 0.100 bsc h 0.76 1.27 0.030 0.050 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m --- 10 --- 10 n 0.76 1.01 0.030 0.040 p1 suffix plastic package case 62605 issue l d suffix plastic package case 75107 (so8) issue w seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 x y g m y m 0.25 (0.010) z y m 0.25 (0.010) z s x s m
mc1458, c http://onsemi.com 7 notes
mc1458, c http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 13036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc1458/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland
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